The design of an eight-digit Fibonacci sequence generator

This paper presents a field programmable gate array (FPGA) prototype of an 8-digit Fibonacci sequence generator. The design is based on the Verilog hardware description language, synthesized by the Xilinx Synthesis Technology (XST) synthesizer, and implemented with the ISE design flow. The circuit was tested to run on the Spartan-3E Starter Kit Board. The resource utilization and the test results are reported. The design itself can be an independent tool or a small device in a bigger system.