• DocumentCode
    1873951
  • Title

    The study of binary decoding cache for instruction-set simulation

  • Author

    Quan Xiao ; Jian Wu ; Zhuo Lin ; Li Kong ; Jing Liu ; Lei Deng ; Shuyu Li ; Tao Zhang ; Fangquan Lin

  • Author_Institution
    School of Northwest Polytechnical University, 710072, Xi´an, China
  • fYear
    2012
  • fDate
    3-5 March 2012
  • Firstpage
    2187
  • Lastpage
    2190
  • Abstract
    Instruction-set simulator (ISS) is used to complete most of the software development and debugging, in order to improve software development efficiency. To improve the performance of instruction-set simulator for ZW100 which was developed by CETC, this paper proposes a optimization strategy for instruction set simulator, with a binary decoding cache which is based on the largest jump block. Using this strategy, the simulator can achieve the adaptive size of cache.
  • Keywords
    Adaptive size of cache; ISS; Loop; The largest jump block;
  • fLanguage
    English
  • Publisher
    iet
  • Conference_Titel
    Automatic Control and Artificial Intelligence (ACAI 2012), International Conference on
  • Conference_Location
    Xiamen
  • Electronic_ISBN
    978-1-84919-537-9
  • Type

    conf

  • DOI
    10.1049/cp.2012.1433
  • Filename
    6493040