Title :
RAM-based fault tolerant state machines for FPGAs
Author :
Frigerio, Laura ; Salice, Fabio
Author_Institution :
Politecnico di Milano, Milan
Abstract :
The paper presents a solution to protect FSM implemented on FPGAs from SEU, exploiting the embedded memories available in modern FPGA devices and a Hamming code for error detection and correction. A fault tolerant FSM architecture is presented, along with a generator to automate the FSM implementation. Experimental results show that this solution is particularly suited especially when FSMs with a large number of outputs are present in the target design.
Keywords :
error correction; error detection; fault tolerance; field programmable gate arrays; finite state machines; random-access storage; FPGA; FSM architecture; Hamming code; RAM; error correction; error detection; fault tolerant state machines; field programmable gate arrays; random-access memory; Circuits; Error correction codes; Fault detection; Fault tolerance; Fault tolerant systems; Field programmable gate arrays; Logic; Protection; Single event upset; Very large scale integration;
Conference_Titel :
Defect and Fault-Tolerance in VLSI Systems, 2007. DFT '07. 22nd IEEE International Symposium on
Conference_Location :
Rome
Print_ISBN :
978-0-7695-2885-4
DOI :
10.1109/DFT.2007.33
