RSA encryption algorithm implemented on FPGA

Author

Iana, Gabriel Vasile ; Anghelescu, Petre ; Serban, Gheorghe

Author_Institution

Dept. of Electron. & Comput., Univ. of Pitesti, Pitesti, Romania

fYear

2011

fDate

7-8 Sept. 2011

Firstpage

1

Lastpage

4

Abstract

In this paper is presented an efficient implementation of the Rivest, Shamir and Adleman (RSA) algorithm as a prototype programmable structure Xilinx Spartan3 to be integrated on an Application Specific Integrated Circuits (ASIC) structure. The purpose of this implementation was the optimization of the Field Programmable Gate Array (FPGA) area used. The paper describes the structures of the constituent modules of the RSA algorithm and obtained results are compared with other similar implementations, including bio-inspired ones based on cellular automata (CA).

Keywords

application specific integrated circuits; field programmable gate arrays; prototypes; public key cryptography; ASIC structure; FPGA area optimization; RSA encryption algorithm implementation; Rivest-Shamir-Adleman algorithm; application specific integrated circuits; field programmable gate array; prototype programmable structure Xilinx Spartan3; Application specific integrated circuits; Automata; Encryption; Field programmable gate arrays; Hardware; Random access memory;

fLanguage

English

Publisher

ieee

Conference_Titel

Applied Electronics (AE), 2011 International Conference on

Conference_Location

Pilsen

ISSN

1803-7232

Print_ISBN

978-1-4577-0315-7

Electronic_ISBN

1803-7232

Type

conf

Filename

6049062