Implementation of an improved connected component labeling algorithm using FPGA-based platform

Labeling of connected components is one of the most fundamental operations in the area of image and video processing. This paper presents a field-programmable gate array (FPGA) platform based approach for implementing an efficient and improved two-scan equivalence-based connected component labeling algorithm. The implementation utilizes standard intellectual-property (IP) elements, FPGA off-the-shelf components, peripherals available on the Xilinx ML-507 FPGA platform and runs on an embedded PowerPC 440 processor available in the Xilinx Virtex-5 xc5vfx70t FPGA device. In this work, the equivalence handling mechanism of Stefano-Bulgarelli (SB) algorithm is improved to achieve complete merger for all the possible cases. The improved algorithm is tested using binary test patterns and standard images. The results demonstrate that the improved algorithm handles equivalences efficiently and gives accurate count of connected components. The proposed FPGA-based system arrangement can be efficiently utilized in many practical image and video processing applications, which uses connected component labeling algorithm.