DocumentCode
187516
Title
Failure analysis of two-bit flipping decoding algorithms
Author
Vasic, Bane ; Nguyen, Duc V.
Author_Institution
Dept. of ECE, Univ. of Arizona, Tucson, AZ, USA
fYear
2014
fDate
22-25 July 2014
Firstpage
1
Lastpage
5
Abstract
We consider a class of bit flipping algorithms for low-density parity-check codes over the binary symmetric channel in which one additional bit at a variable and check nodes is employed. For these two-bit flipping algorithms, we give and illustrate through examples a recursive procedure for finding all uncorrectable error patters and corresponding induced subgraphs, referred as a trapping set profile. This procedure is used to select a small collection of good algorithms that in a decoding diversity approach, run in parallel or serial, outperform Gallager A/B, min-sum and sum product algorithm in the error floor region.
Keywords
decoding; parity check codes; binary symmetric channel; decoding diversity approach; low-density parity-check codes; recursive procedure; two-bit flipping decoding algorithms; Algorithm design and analysis; Charge carrier processes; Decoding; Indexes; Iterative decoding; Vectors; Bit flipping algorithms; error floor; low-density parity-check codes; trapping set;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing and Communications (SPCOM), 2014 International Conference on
Conference_Location
Bangalore
Print_ISBN
978-1-4799-4666-2
Type
conf
DOI
10.1109/SPCOM.2014.6983914
Filename
6983914
Link To Document