DocumentCode :
1875842
Title :
PLD, complex PLD, and FPGA applications using VHDL
Author :
Coppola, Alan J.
Author_Institution :
Cypress Semicond., San Jose, CA, USA
fYear :
1993
fDate :
12-14 Oct 1993
Firstpage :
93
Lastpage :
101
Abstract :
An introduction to using VHDL to map designs to PLD, CPLD, and FPGA programmable logic devices is presented. The expressive and portability powers of VHDL have been illustrated by mapping a single design to the three target programmable logic architecture types using a single tool, Warp2. Since the design language is an IEEE standard, this same design can be ported to any other CAD environment which supports VHDL
Keywords :
IEEE standards; field programmable gate arrays; hardware description languages; logic CAD; programmable logic devices; CAD environment; FPGA applications; IEEE standard; PLD; VHDL; Warp2; complex PLD; portability; programmable logic architecture types; programmable logic devices; Circuit synthesis; Field programmable gate arrays; Joining processes; Logic; Multiplexing; Output feedback; Signal design; Signal synthesis; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Northcon/93. Conference Record
Conference_Location :
Portland, OR
Print_ISBN :
0-7803-9972-2
Type :
conf
DOI :
10.1109/NORTHC.1993.505039
Filename :
505039
Link To Document :
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