DocumentCode
1876200
Title
The Patterning of Electric Circuits by Mask-Deposition Technology
Author
Yotsuya, S. ; Makigaki, T.
Author_Institution
Production Engineering & Development Div., SEIKO EPSON Corporation, Japan
fYear
2006
fDate
2006
Firstpage
294
Lastpage
297
Abstract
We dev eloped the dep osition-mask to apply MEMS techn olog y and the mask-de positio n technology to pattern fine precise electric circuits. As the mask was fabricated to from a dry-et ching proc ess using the De ep-Si-RIE and a wet-etching pro cess, this mask can pattern fine precision electric circuits. We also dev eloped ma sk contact tech nolo gy that maintains go od co ntact betw een the mask and the substrate. The tech nolo gy is such a that magn etic layer is dep osited on the mask surface by using electroless-plating, and achieves go od adh esion for inserting the substrate between this mask an d the rub ber she et magn et. Th ese techn ologies sh ow that the fine precise electric circuits of 28 µ m lines and 18 µ m spaces can be consta ntly achieved. In addition, this electric-pattern is continu al and is not disrupted by the shade of the beam that reinforc es the mask.
Keywords
Circuits; Etching; Fabrication; Lithography; Oxidation; Product development; Production engineering; Resists; Silicon; Watches;
fLanguage
English
Publisher
ieee
Conference_Titel
Micro Electro Mechanical Systems, 2006. MEMS 2006 Istanbul. 19th IEEE International Conference on
Conference_Location
Istanbul, Turkey
ISSN
1084-6999
Print_ISBN
0-7803-9475-5
Type
conf
DOI
10.1109/MEMSYS.2006.1627794
Filename
1627794
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