Evaluation of geometry layout and metal pattern to optimize ESD performance of silicon controlled rectifier (SCR)

We investigate the geometry layout and metal pattern in order to seek robust and optimized electrostatic discharge (ESD) performance for the silicon controlled rectifier (SCR). Parallel and crossing topologies, and different emitter lengths of the parasitic bipolar transistors, finger widths, and finger numbers are shown to significantly affect not only the ESD robustness but also the holding voltage of SCR. This paper provides useful guidelines to ameliorate the SCR performance for ESD protection applications.