An efficient designed prototype technique for OFDM PAPR reduction using FPGA

In this paper, a proposed designed technique to reduce Orthogonal Frequency Division Multiplexing (OFDM) Peak-to-Average Power Ratio (PAPR) value is done. This designed technique contains new block which is inserted in the OFDM system. This proposed block is applied to WiMAX system as an example of OFDM technology. Afterwards, several MATLAB programs are executed to discuss the behavior and the characteristics of this proposed block. In addition, the effect of its insertion on the original system is studied. Due to this insertion, 0 dB OFDM PAPR value can be achieved. Furthermore, it can be synthesized practically. This proposed system is implemented over Field Programmable Gate Array (FPGA). The designed circuit is characterized by both its low complexity and its high speed. Moreover, it is portable circuit. This means that it can be implemented over any FPGA kit regardless of its technology.