An Emulation Technique for Diagnosis and Failure Analysis of ATE

Author

Hashempour, Hamidreza ; Lombardi, Fabrizio ; Mehta, Rakesh ; Alton, Timothy ; Necoechea, Warren

Author_Institution

Dept. of Electr. & Comput. Eng., Northeastern Univ., Boston, MA

fYear

2006

fDate

24-27 April 2006

Firstpage

96

Lastpage

100

Abstract

This paper deals with a novel emulation technique which is applicable to the diagnosis and failure analysis of automatic-test-equipment (ATE) as widely used for testing integrated circuits (ICs) at manufacturing. Due to their complexity, manufacturers are facing substantial difficulties in diagnosing ATEs. In this paper, we present a novel emulation-based technique by establishing an integrated environment for the execution of hardware description language (HDL) tests (which were developed for design verification of the HDL models) on the manufactured ATE. Possible failure information is back annotated into the HDL models to locate the errors. Diagnosis and design engineering teams can then cooperate within a single environment

Keywords

automatic test equipment; failure analysis; fault diagnosis; integrated circuit testing; reliability; HDL models; automatic-test-equipment; design verification; failure analysis; failure information; hardware description language; integrated circuit testing; integrated environment; Automatic testing; Circuit testing; Emulation; Failure analysis; Hardware design languages; Integrated circuit manufacture; Integrated circuit testing; Manufacturing automation; Pulp manufacturing; Virtual manufacturing; ATE; Diagnosis; Failure Analysis; HDL; Ver-ilog; Verification;

fLanguage

English

Publisher

ieee

Conference_Titel

Instrumentation and Measurement Technology Conference, 2006. IMTC 2006. Proceedings of the IEEE

Conference_Location

Sorrento

ISSN

1091-5281

Print_ISBN

0-7803-9359-7

Electronic_ISBN

1091-5281

Type

conf

DOI

10.1109/IMTC.2006.328291

Filename

4124284