Title :
Mechanical stress effects on p-channel MOSFET performance and NBTI reliability
Author :
Ioannou, Dimitris P. ; La Rosa, G.
Author_Institution :
Semicond. R&D Center, IBM Microelectron., Hopewell Junction, NY, USA
Abstract :
Because of the strong sensitivity to gate oxide processing it has been difficult to compare and correctly quantify the effect of pure mechanical stress on the MOSFETs with different level of device stress engineering. We report, for the first time, a detailed evaluation of the impact of mechanical compressive and tensile stress on device performance and NBTI reliability of p-MOSFET devices with identical gate oxide. These effects were investigated by exploiting the well known induced mechanical effects on devices placed in proximity to Through Silicon Vias (TSV) [1,2]. A detailed electrical device characterization at time-zero (pre-NBTI stress) confirms a p-MOSFET mobility modulation dependence on proximity to TSV, device channel orientation and device temperature, consistent with the underlying Cu directional tensile and compressive mechanical stress dependence on Si. It is found that the NBTI induced Threshold Voltage shift is not affected by the mechanical stress. On the contrary, it is found that the NBTI component contributing to mobility degradation is strongly dependent on the level of the applied mechanical stress. This finding gives some further insights on the nature of the NBTI damage.
Keywords :
MOSFET; copper; integrated circuit reliability; negative bias temperature instability; three-dimensional integrated circuits; Cu; NBTI reliability; TSV; compressive mechanical stress dependence; device channel orientation; device stress engineering; device temperature; directional tensile stress dependence; electrical device characterization; gate oxide; mechanical compressive stress; mobility degradation; mobility modulation dependence; p-channel MOSFET performance; pre-NBTI stress; through silicon vias; time-zero; Degradation; Logic gates; MOSFET; Stress; Temperature; Temperature measurement; Through-silicon vias; High-k dielectrics; MOSFET; Mechanical Stress; NBTI; SOI; Through-Silicon-Via (TSV);
Conference_Titel :
Reliability Physics Symposium, 2014 IEEE International
Conference_Location :
Waikoloa, HI
DOI :
10.1109/IRPS.2014.6861196