Digital control scheme for robust clock tuning and PWM phase synchronization in digitally controlled multi-POL applications

Author

O´Malley, Eamon ; Rinne, Karl ; Kelly, Anthony ; Almukhtar, Basil ; Kelleher, Paul

Author_Institution

Powervation Ltd., Limerick, Ireland

fYear

2010

fDate

21-25 Feb. 2010

Firstpage

1922

Lastpage

1926

Abstract

This paper describes a novel clock tuning and subsequent PWM phase synchronization scheme for digitally controlled switching power converters. Its architecture and circuit blocks are presented and explained in detail. The scheme has been implemented in a commercially available digital controller integrated circuit (IC) using a standard CMOS process. Experimental results from a multi point-of-load (POL) application are presented.

Keywords

CMOS digital integrated circuits; DC-DC power convertors; PWM power convertors; circuit tuning; clocks; digital control; switching convertors; synchronisation; CMOS process; DC-DC POL conversion; PWM phase synchronization; digital controller integrated circuit; digitally controlled multiPOL; digitally controlled switching power converters; multi point-of-load; robust clock tuning; CMOS digital integrated circuits; CMOS integrated circuits; Circuit optimization; Clocks; Digital control; Pulse width modulation; Pulse width modulation converters; Robust control; Switching converters; Synchronization;

fLanguage

English

Publisher

ieee

Conference_Titel

Applied Power Electronics Conference and Exposition (APEC), 2010 Twenty-Fifth Annual IEEE

Conference_Location

Palm Springs, CA

ISSN

1048-2334

Print_ISBN

978-1-4244-4782-4

Electronic_ISBN

1048-2334

Type

conf

DOI

10.1109/APEC.2010.5433497

Filename

5433497