Title :
Work efficient parallel algorithms for large graph exploration
Author :
Banerjee, Dip Sankar ; Sharma, Shantanu ; Kothapalli, Kishore
Author_Institution :
Int. Inst. of Inf. Technol., Hyderabad, India
Abstract :
Graph algorithms play a prominent role in several fields of sciences and engineering. Notable among them are graph traversal, finding the connected components of a graph, and computing shortest paths. There are several efficient implementations of the above problems on a variety of modern multiprocessor architectures. It can be noticed in recent times that the size of the graphs that correspond to real world data sets has been increasing. Parallelism offers only a limited succor to this situation as current parallel architectures have severe short-comings when deployed for most graph algorithms. At the same time, these graphs are also getting very sparse in nature. This calls for particular work efficient solutions aimed at processing large, sparse graphs on modern parallel architectures. In this paper, we introduce graph pruning as a technique that aims to reduce the size of the graph. Certain elements of the graph can be pruned depending on the nature of the computation. Once a solution is obtained for the pruned graph, the solution is extended to the entire graph. We apply the above technique on three fundamental graph algorithms: breadth first search (BFS), Connected Components (CC), and All Pairs Shortest Paths (APSP). To validate our technique, we implement our algorithms on a heterogeneous platform consisting of a multicore CPU and a GPU. On this platform, we achieve an average of 35% improvement compared to state-ofthe-art solutions. Such an improvement has the potential to speed up other applications that rely on these algorithms.
Keywords :
graph theory; graphics processing units; multiprocessing systems; parallel algorithms; parallel architectures; tree searching; APSP; BFS; GPU; all pairs shortest paths; breadth first search; connected components; graph algorithm; graph exploration; graph pruning; graph traversal; heterogeneous platform; multicore CPU; multiprocessor architecture; parallel algorithms; parallel architecture; Algorithm design and analysis; Arrays; Graphics processing units; Instruction sets; Parallel architectures; Parallel processing;
Conference_Titel :
High Performance Computing (HiPC), 2013 20th International Conference on
Conference_Location :
Bangalore
DOI :
10.1109/HiPC.2013.6799125