Title :
Parallel regeneration of interconnections in VLSI & ULSI circuits
Author :
Nekili, M. ; Savaria, Yvon
Author_Institution :
Ecole Polytechnique of Montreal
Keywords :
Delay effects; Integrated circuit interconnections; Integrated circuit technology; Inverters; Logic; Propagation delay; Ultra large scale integration; Very large scale integration; Voltage; Wire;
Conference_Titel :
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location :
IEEE
Print_ISBN :
0-7803-1281-3