Title :
A Reconfigurable Processing Unit for Digital Circuit Testing using Built-In Self-Test Techniques
Author :
Elbadri, Mohammed ; Groza, Voicu ; Abielmona, Rami ; Assaf, Mansour
Author_Institution :
Sch. of Inf. Technol. & Eng., Ottawa Univ., Ont.
Abstract :
This paper introduces a novel architecture that is targeted for digital circuit testing application by means of built-in self-test techniques. These applications consist of static configurable hardware designs that will execute the testing of the digital circuit in hardware, where previous literature has established it´s testing in software consequently introducing a hardware accelerator. In this paper we show the novel architecture to digital circuit testing in hardware on a reconfigurable processing unit for compile-time reconfiguration
Keywords :
built-in self test; integrated circuit testing; reconfigurable architectures; built-in self-test; compile-time reconfiguration; digital circuit testing; hardware accelerator; reconfigurable processing unit; static configurable hardware designs; Application software; Automatic testing; Built-in self-test; Circuit testing; Computer architecture; Coprocessors; Digital circuits; Field programmable gate arrays; Hardware; Microprocessors; Built-In Self-Test (BIST); Circuit Under Test (CUT); Compile-Time Reconfiguration (CTR); Reconfigurable Processing Unit (RPU); fault injection testing;
Conference_Titel :
Instrumentation and Measurement Technology Conference, 2006. IMTC 2006. Proceedings of the IEEE
Conference_Location :
Sorrento
Print_ISBN :
0-7803-9359-7
Electronic_ISBN :
1091-5281
DOI :
10.1109/IMTC.2006.328406
