DocumentCode :
1878350
Title :
High-level Accurate Model of High-resolution Pipelined ADC´s
Author :
Azzolini, C. ; Vecchi, D. ; Boni, A. ; Chiorboli, G.
Author_Institution :
Dept. of Inf. Eng., Parma Univ.
fYear :
2006
fDate :
24-27 April 2006
Firstpage :
261
Lastpage :
265
Abstract :
This paper describes an accurate model for the systematic design and the simulation of high-resolution pipelined ADCs. The design is based on the non-linearities affecting the ADC whereas the goal is the evaluation of the best architecture matching the specifications (DNL and INL). Bit partitioning along pipeline chain, amplifiers specifications (designed down to transistor-level in both CMOS and BiCMOS technologies), capacitors size, power consumption and calibration requirements are delivered. An integrated simulation tool allows the performances evaluation of the converter. The complete design suite was implemented in MATLAB
Keywords :
analogue-digital conversion; circuit CAD; circuit simulation; logic CAD; logic partitioning; BiCMOS technology; CMOS technology; DNL specification; INL specification; amplifiers specifications; analogue-digital conversion; automatic ADC design; bit partitioning; calibration requirements; circuit nonlinearity; high-level accurate model; high-resolution pipelined ADC; integrated simulation tool; transistor-level; BiCMOS integrated circuits; CMOS technology; Calibration; Energy consumption; MATLAB; Mathematical model; Performance evaluation; Pipelines; Power amplifiers; Power capacitors; DNL; INL; Pipeline modelling; automatic ADC design; calibration techniques;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Instrumentation and Measurement Technology Conference, 2006. IMTC 2006. Proceedings of the IEEE
Conference_Location :
Sorrento
ISSN :
1091-5281
Print_ISBN :
0-7803-9359-7
Electronic_ISBN :
1091-5281
Type :
conf
DOI :
10.1109/IMTC.2006.328411
Filename :
4124322
Link To Document :
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