• DocumentCode
    1878841
  • Title

    Reconfigurable architectures for GNSS receiver

  • Author

    Khatri, Kriti ; Gajjar, Nagendra

  • Author_Institution
    Institute of Technology, Nirma University
  • fYear
    2012
  • fDate
    6-8 Dec. 2012
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Satellite based navigation is a rapidly growing application of satellite systems. The recent development of the various Global Navigation Satellite Systems (GNSS) demands attention towards very important technical aspects of interoperability and compatibility. Navigation solution from different constellations translates to an improvement in higher measurement redundancy and improved reliability. In the interoperable receivers the most expensive parts — front ends — can be shared for signal reception of different systems. The scope of this paper is to discuss the reconfigurable Software Defined Receiver (SDR) for GNSS. The paper also opens a window to the implementation of reconfigurable hardware/software multioperable GNSS receiver, featuring sufficient computational power and flexibility.
  • Keywords
    Application Specific Integrated Circuit (ASIC); Field Programmable Gate Array (FPGA); Global Navigation Satellite Systems (GNSS); Software Defined Receiver (SDR); System on Chip (SoC);
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Engineering (NUiCONE), 2012 Nirma University International Conference on
  • Conference_Location
    Ahmedabad, Gujarat, India
  • Print_ISBN
    978-1-4673-1720-7
  • Type

    conf

  • DOI
    10.1109/NUICONE.2012.6493243
  • Filename
    6493243