Interactive BIST for Embedded Core in SOC: Partial Matching and Control Sequences Technique

With core based design having been widely adopted, the use of BIST techniques has become more attractive testing approach. There are several techniques deployed to make BIST more efficient. Among these techniques mixed mode approach has proven to be more viable than earlier approaches. To minimize the control data required for such an approach, we propose in this paper a new technique called "partial pattern matching" that filters patterns used for detecting random pattern resistant (RPR) faults without relying on fault simulation. We illustrate the use of this technique in iBIST environment and demonstrate a substantial reduction in the sequence needed to control the LFSR, test application time