Title :
A VC-merge capable switch reducing buffer requirement by sharing reassembly buffers in MPLS
Author :
Sakamoto, Kenji ; Nishino, Yoshiyuki ; Sasase, Iwao
Author_Institution :
Dept. of Inf. & Comput. Sci., Keio Univ., Yokohama, Japan
Abstract :
In the MPLS (multiprotocol label switching), VC-merge (virtual circuit-merge) is known as a scalable technique to reduce the total number of VC. However, in the conventional VC-merge capable switch, the number of reassembly buffers greatly increases as the switch size grows large. We propose a VC-merge capable switch with less buffer requirement. In the proposed model, we can reduce the number of reassembly buffers and decrease the access speed of buffer memory since we can share reassembly buffers between the cells that arrived at all input ports by the controller. We compare the packet loss probability and the mean system delay performance of the proposed model with those of the conventional model by computer simulations. As a result, we show that the number of reassembly buffers decreases on the order of O(N) and the access speed of buffer memory becomes low. Therefore, the proposed model is effective in MPLS
Keywords :
buffer storage; delays; packet switching; probability; transport protocols; MPLS; VC-merge capable switch; access speed reduction; buffer memory; buffer requirement reduction; computer simulations; controller; mean system delay performance; multiprotocol label switching; packet loss probability; reassembly buffers sharing; scalable technique; virtual circuit-merge; Assembly; Asynchronous transfer mode; Hardware; Multiprotocol label switching; Packet switching; Routing; Switches; Switching circuits; Telecommunication traffic; Virtual colonoscopy;
Conference_Titel :
Global Telecommunications Conference, 2001. GLOBECOM '01. IEEE
Conference_Location :
San Antonio, TX
Print_ISBN :
0-7803-7206-9
DOI :
10.1109/GLOCOM.2001.965076