VTest system overview

The need to reduce time to market and test development costs of Printed Circuit Card Assemblies (PCAs)/Line Replaceable Modules (LRMs) Test Program Sets (TPSs), has been a major concern for both industry and government. The lack of tools is the contributing factor to lengthy development times and high initial TPS development costs and subsequent higher costs of rehosting existing TPSs. These tools are Unit Under Test (UUT) and test resource simulation software, portable test information, and virtual test development for UUT design and test engineers. The Virtual Test (VTest) Program addresses the non-availability of appropriate tools and methodologies to support the design of TPSs during initial development and subsequent life-cycle maintenance periods. VTest will provide methodologies and tools that permit the design, capture, and simulation of tester independent test requirements, UUT models, and tester resource description information. The information developed will be utilized by multiple varieties of military and commercial testers, and will provide design requirements for test adapters