Throughput analysis of MIQ switches

The multiple input-queued (MIQ) switch is the switch which manages multiple (m) queues in each input port, each of which is dedicated to a group of output ports. Since each input port can attend m arbitration rounds, the switch suffers from a reduced HOL blocking which is known as the decisive factor limiting the throughput of the pure single input-queued (SIQ) packet switch. As a result, the MIQ switch guarantees satisfying performance characteristics as the number of queues m increases. However, the service of multiple cells from an input could cause the internal speedup or expansion of the switch fabric, diluting the merit of high-speed operation in the conventional SIQ scheme. The restricted rule is contrived to circumvent this side effect by regulating the number of cells switched from an input port to just one cell. In this paper we analyze the performance of the MIQ ATM switch employing the restricted rule. For the switch using the restricted rule, the closed formulae for the throughput bound of the switch are derived as the function of m, by generalizing the analysis for the SIQ switch by Hui et al. (1987)