DocumentCode
188036
Title
Non-intrusive DVFS emulation in gem5 with application to self-aware architectures
Author
Haririan, Parham ; Garcia-Ortiz, Alberto
Author_Institution
Inst. of Electrodynamics & Microelectron., Univ. of Bremen, Bremen, Germany
fYear
2014
fDate
26-28 May 2014
Firstpage
1
Lastpage
7
Abstract
The emergence of multi-processor systems-on-chip (MPSoC), the close interaction between the hardware architecture and the operating system, and the increasing requirements for energy efficiency are exacerbating the need for full-system architecture simulators such as gem5. A commonly-used technique for power optimizations is dynamic voltage and frequency scaling (DVFS). Native gem5 does not support DVFS. This work presents an efficient approach for prototyping and emulating DVFS in gem5. The approach is non-intrusive, easily modifiable and flexible. Several experimental results are provided to assess the efficiency of the method. Finally a test-case related to self-aware systems is presented to highlight the flexibility of the approach.
Keywords
circuit optimisation; energy conservation; multiprocessing systems; system-on-chip; MPSoC; dynamic voltage and frequency scaling; energy efficiency; full-system architecture simulators; gem5; hardware architecture; multiprocessor system-on-chip; nonintrusive DVFS emulation; operating system; power optimizations; self-aware architectures; Analytical models; Computer architecture; Emulation; Heart beat; Kernel; Switches; Time-frequency analysis; DVFS; MPSoC; architecture; emulation; full-system; low-power; self-aware architecture; simulator;
fLanguage
English
Publisher
ieee
Conference_Titel
Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2014 9th International Symposium on
Conference_Location
Montpellier
Type
conf
DOI
10.1109/ReCoSoC.2014.6861356
Filename
6861356
Link To Document