• DocumentCode
    188132
  • Title

    Experiments in Mapping Expressions to DSP Blocks

  • Author

    Ronak, Bajaj ; Fahmy, Suhaib A.

  • Author_Institution
    Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore, Singapore
  • fYear
    2014
  • fDate
    11-13 May 2014
  • Firstpage
    101
  • Lastpage
    101
  • Abstract
    Mapping complex mathematical expressions to DSP blocks by relying on synthesis from pipelined code is inefficient and results in significantly reduced throughput. We have developed a tool to demonstrate the benefit of considering the structure and pipeline arrangement of the DSP block in mapping of functions. Implementations where the structure of the DSP block is considered during pipelining achieve double the throughput of other methods, demonstrating that the structure of the DSP block must be considered when scheduling complex expressions.
  • Keywords
    digital signal processing chips; pipeline processing; processor scheduling; DSP block structure; complex expression scheduling; complex mathematical expression mapping; pipeline arrangement; pipelining; Computers; Digital signal processing; Educational institutions; Field programmable gate arrays; Pipeline processing; Program processors; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field-Programmable Custom Computing Machines (FCCM), 2014 IEEE 22nd Annual International Symposium on
  • Conference_Location
    Boston, MA
  • Print_ISBN
    978-1-4799-5110-9
  • Type

    conf

  • DOI
    10.1109/FCCM.2014.34
  • Filename
    6861596