• DocumentCode
    188166
  • Title

    Harmonica: An FPGA-Based Data Parallel Soft Core

  • Author

    Kersey, Chad ; Yalamanchili, Sudhakar ; Hyojong Kim ; Nigania, Nimit ; Hyesoon Kim

  • Author_Institution
    Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
  • fYear
    2014
  • fDate
    11-13 May 2014
  • Firstpage
    171
  • Lastpage
    171
  • Abstract
    General-purpose GPUs or GPGPUs have taken their place in the market, being present in 38 of the Top 500 supercomputers [5]. In the same way that the emergence of FPGAs in the 1980s led to a demand for soft cores with instruction sets similar to the CPUs of the day, we anticipate a similar demand in the 2010s for soft cores with GPGPU instruction sets. These architectures are distinguished by their SIMT, single-instruction-multiple-thread, execution model, acheiving throughput by running multiple threads of execution simultaneously across multiple functional units, keeping separate register values for each lane of execution.
  • Keywords
    field programmable gate arrays; graphics processing units; instruction sets; multiprocessing systems; parallel processing; FPGA; GPGPU; GPGPU instruction sets; SIMT; data parallel soft core; execution model; general purpose GPU; single instruction multiple thread; soft cores; Computer architecture; Educational institutions; Field programmable gate arrays; Hardware; Instruction sets; Prototypes; Registers; C++; FPGA; GPGPU; SIMT; data parallel; processor near memory;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field-Programmable Custom Computing Machines (FCCM), 2014 IEEE 22nd Annual International Symposium on
  • Conference_Location
    Boston, MA
  • Print_ISBN
    978-1-4799-5110-9
  • Type

    conf

  • DOI
    10.1109/FCCM.2014.53
  • Filename
    6861615