DocumentCode
1881789
Title
VLSI device parameters extraction for radiation hardness modeling with SPICE
Author
Petrosjanc, K.O. ; Kharitonov, I.A.
Author_Institution
Moscow Inst. of Electron. Machine Bldg., Russia
fYear
1993
fDate
22-25 Mar 1993
Firstpage
9
Lastpage
14
Abstract
For purposes of radiation hardness modeling with SPICE (simulation program with IC emphasis), the procedures for bipolar and MOS transistor model parameter definition are described. The procedures are derived for standard and modified SPICE models. Examples of parameter extraction for irradiated devices are given
Keywords
SPICE; VLSI; bipolar transistors; circuit CAD; insulated gate field effect transistors; network parameters; radiation hardening (electronics); semiconductor device models; MOS transistor; SPICE; VLSI device parameters extraction; bipolar transistors; irradiated devices; model parameter definition; radiation hardness modeling; simulation program; Data mining; Degradation; Integrated circuit modeling; MOSFETs; Parameter extraction; Predictive models; Radiation effects; SPICE; Threshold voltage; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronic Test Structures, 1993. ICMTS 1993. Proceedings of the 1993 International Conference on
Conference_Location
Sitges
Print_ISBN
0-7803-0857-3
Type
conf
DOI
10.1109/ICMTS.1993.292901
Filename
292901
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