A Hardware MPI Spawn for Distributed Multiprocessing Reconfigurable System on Chip (MP-RSoC)

This abstract describes MPI-HCL, a hardware middleware for VHDL designers of scalable Multi processing reconfigurable System on Chip (MP-RSoC) using distributed memory paradigm. Some tools, like Planahead or Goahead [1] help to integrate dynamic reconfiguration inside MP-RSoC design but the conception phase of the MP-RSoC is separated from the deployment phase and it is very painful for designers to handle hundreds of hardware tasks and interconnect them properly. Some engineers and researchers proposed hardware operating systems denoted as HW OS [2] to manage deployment of hardware tasks in reconfigurable FPGA but HW-OS requirements adds constraints on hardware tasks. With our platform, heterogenous hardware tasks are modeled as MPI processes, and are compliant with MPI2 standard described in [3]. MPI relies on message passing to exchange data between hardware tasks and this paradigm is known to scale well in multiprocessing architecture.