Title :
High-Throughput and Low-Cost Hardware Accelerator for Privacy Preserving Publishing
Author :
Yamaguchi, Fumito ; Nishi, Hiroaki
Author_Institution :
Dept. of Sci. & Technol., Keio Univ., Keio, Japan
Abstract :
Deep Packet Inspection (DPI) has become crucial for providing rich internet services, such as intrusion and phishing protection, but the use of DPI raises concerns for protecting the privacy of internet users. In this paper, a RAM-based hardware anonymizer is proposed for implementation on a Virtex-5 FPGA device. The results of the hardware anonymizer showed that the proposed architecture reduced circuit usage by 40%.
Keywords :
Internet; computer crime; data privacy; electronic publishing; field programmable gate arrays; random-access storage; Internet services; RAM-based hardware anonymizer; Virtex-5 FPGA device; circuit usage; hardware anonymizer; high-throughput low-cost hardware accelerator; intrusion protection; phishing protection; privacy preserving publishing; Data privacy; Field programmable gate arrays; Hardware; Internet; Privacy; Random access memory; Table lookup; Anonymization; Deep Packet Inspection; FPGA;
Conference_Titel :
Field-Programmable Custom Computing Machines (FCCM), 2014 IEEE 22nd Annual International Symposium on
Conference_Location :
Boston, MA
Print_ISBN :
978-1-4799-5110-9
DOI :
10.1109/FCCM.2014.77
