DocumentCode :
1882823
Title :
"Analogue Network of Converters": A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC
Author :
Kerzérho, V. ; Cauvet, P. ; Bernard, S. ; Azaïs, F. ; Comte, M. ; Renovell, M.
Author_Institution :
LIRMM, Montpellier Univ.
fYear :
2006
fDate :
21-24 May 2006
Firstpage :
159
Lastpage :
164
Abstract :
In this paper, complex mixed signal circuits such as SiP or SOC including several ADCs and DACs are considered. A new DFT technique is proposed allowing the test of this complete set of embedded ADCs and DACs in a fully digital way such that only a simple low cost tester can be used. Moreover, this technique called "analogue network of converters" (ANC) requires an extremely simple additional circuitry and interconnect
Keywords :
analogue-digital conversion; design for testability; digital-analogue conversion; integrated circuit testing; system-in-package; system-on-chip; analog-to-digital converters; analogue network of converters; design for testability; digital-analog converters; mixed signal circuits; system-in-package; system-on-chip; Circuit testing; Costs; Crosstalk; Equations; Instruments; Intelligent networks; Semiconductor device measurement; Space exploration; System testing; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium, 2006. ETS '06. Eleventh IEEE European
Conference_Location :
Southampton
Print_ISBN :
0-7695-2566-0
Type :
conf
DOI :
10.1109/ETS.2006.1
Filename :
1628169
Link To Document :
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