DocumentCode
1883484
Title
A 32nm High-k metal gate SRAM with adaptive dynamic stability enhancement for low-voltage operation
Author
Hyunwoo Nho ; Kolar, Petar ; Hamzaoglu, Fatih ; Yih Wang ; Karl, E. ; Yong-Gee Ng ; Bhattacharya, Ujjwal ; Zhang, Kai
Author_Institution
Intel, Hillsboro, OR, USA
fYear
2010
fDate
7-11 Feb. 2010
Firstpage
346
Lastpage
347
Abstract
A 3.4 Mb SRAM macro is developed with a built-in stability sensor for adaptive wordline under-drive (AWLUD) in 32 nm HK-MG CMOS technology. By tracking temperature, voltage and process variation of each die, the AWLUD is shown to lower VCCmin by 130 mV, increase yield by 9% at a target frequency, and is projected to reduce test time up to 40% by eliminating die-by-die WLUD programming.
Keywords
CMOS memory circuits; random-access storage; stability; HK-MG CMOS technology; SRAM macro; adaptive dynamic stability enhancement; adaptive wordline underdrive; die-by-die WLUD programming; high-κ metal gate SRAM; low-voltage operation; process variation; stability sensor; target frequency; temperature tracking; voltage tracking; CMOS technology; Circuits; Degradation; Frequency; Random access memory; Sensor arrays; Stability; Temperature sensors; Testing; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International
Conference_Location
San Francisco, CA
ISSN
0193-6530
Print_ISBN
978-1-4244-6033-5
Type
conf
DOI
10.1109/ISSCC.2010.5433816
Filename
5433816
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