• DocumentCode
    1883776
  • Title

    A 32mW 7.4Gb/s protocol-agile source-series-terminated transmitter in 45nm CMOS SOI

  • Author

    Dettloff, W.D. ; Eble, John C. ; Lei Luo ; Kumar, Pranaw ; Heaton, Fred ; Stone, T. ; Daly, Barry

  • Author_Institution
    Rambus, Chapel Hill, NC, USA
  • fYear
    2010
  • fDate
    7-11 Feb. 2010
  • Firstpage
    370
  • Lastpage
    371
  • Abstract
    An SST transmitter is described with ground regulation, P-to-N shunting and partially weighted segments for fine granularity level/equalization. Clocks and datapath dissipate 32mW at 7.4Gb/s with an 800mV eye for a power efficiency of 4.32mW/(Gb/s). Measured total jitter is 209.6mUI or 28.3ps at 10-12 BER. Target protocols include PCIe G1/2, XAUI, FC 1/2/4, CEI6 MR and SATA 1/2.
  • Keywords
    CMOS integrated circuits; error statistics; protocols; transmitters; -to-N shunting; 45nm CMOS SOI; bit rate 7.4 Gbit/s; power 32 mW; power 4.32 mW; power efficiency; protocol-agile source-series terminated transmitter; voltage 800 mV; Capacitance; Clocks; Current supplies; Delay; Driver circuits; Impedance; Jitter; Optical transmitters; Packaging; Protocols;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0193-6530
  • Print_ISBN
    978-1-4244-6033-5
  • Type

    conf

  • DOI
    10.1109/ISSCC.2010.5433825
  • Filename
    5433825
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1883776