• DocumentCode
    1884239
  • Title

    IEEE 1588 implementation with FLL vs. PLL

  • Author

    Zhu Wensi

  • Author_Institution
    Dept. of Electron. & Commun. Eng., Tampere Univ. of Technol., Tampere, Finland
  • fYear
    2013
  • fDate
    22-27 Sept. 2013
  • Firstpage
    71
  • Lastpage
    76
  • Abstract
    This paper discusses the IEEE 1588 implementation with Frequency Locked Loop (FLL) and Phase Locked Loop (PLL). The work was supported by a Telecom technology provider; the objective is to study the feasibility of IEEE 1588 in the Base Stations (BSs) synchronization, on the basis of minimum structure changes. In order to meet the requirements of the mobile communication systems, IEEE 1588 was implemented using two different methods - the FLL and PLL. Based on the synchronization result, it is observed that the FLL method shows over adjustments when the network Packet Delay Variation (PDV) is large while the PLL method is likely to be affected by the amount of traffic from the master to the slave clock. Additionally, it is also observed that the overdamped PLL gives high frequency accuracy, but also amplifies the effect of PDV, resulting in a larger frequency instability.
  • Keywords
    frequency locked loops; mobile communication; phase locked loops; FLL; IEEE 1588; PDV; PLL; base station synchronization; frequency locked loop; mobile communication system; network packet delay variation; phase locked loop; Clocks; Delays; Frequency locked loops; IIR filters; Phase locked loops; Synchronization; Time-frequency analysis; FLL; IEEE 1588; NTP; PLL; Time accuracy; frequency accuracy;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Precision Clock Synchronization for Measurement Control and Communication (ISPCS), 2013 International IEEE Symposium on
  • Conference_Location
    Lemgo
  • ISSN
    1949-0305
  • Print_ISBN
    978-1-4799-0241-5
  • Type

    conf

  • DOI
    10.1109/ISPCS.2013.6644766
  • Filename
    6644766