• DocumentCode
    1884775
  • Title

    A two stage parallel encoder scheme for real time video encoder

  • Author

    Shengfu Dong ; Zhihang Wang ; Ronggang Wang ; Zhenyu Wang ; Wen Gao

  • Author_Institution
    Shenzhen Grad. Sch., Sch. of Comput. & Inf. Eng., Peking Univ., Shenzhen, China
  • fYear
    2012
  • fDate
    12-15 Aug. 2012
  • Firstpage
    280
  • Lastpage
    285
  • Abstract
    With the development of hardware technologies, multi-core processor becomes more and more popular. At the same time, the performance of video encoding technologies is greatly improved at the cost of complexity. How to exploit the computing capacity of the multi-core processors efficiently to meet the demand of video encoding technology is a challenging task. Traditional work usually split the frame into slices to enable parallel encoding. But the coding efficiency will lose especially when there are more slices. In this paper, first we propose a two stage real time encoding scheme without splitting the frame into slices. Secondly, some modules in the hybrid video coding scheme, such as interpolation and loop filter, are split into independent modules that can be processed in parallel. A simple and effective task scheduling strategy is also proposed to fully exploit the CPU capacity. Finally, fast algorithms suitable for this architecture are developed. Experimental results show that we can encode the 720p sequence at about 50 fps with little loss in the rate distortion performance.
  • Keywords
    image sequences; multiprocessing systems; parallel processing; processor scheduling; video coding; CPU capacity; hybrid video coding scheme; interpolation filter; loop filter; multicore processor; parallel processing; rate distortion performance; real time video encoder technology; task scheduling strategy; two stage parallel encoder scheme; video sequence; Bit rate; Encoding; Interpolation; Multicore processing; Vectors; Video coding; AVS; Fast mode decision; Parallel encoding; Real time video encoder;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signal Processing, Communication and Computing (ICSPCC), 2012 IEEE International Conference on
  • Conference_Location
    Hong Kong
  • Print_ISBN
    978-1-4673-2192-1
  • Type

    conf

  • DOI
    10.1109/ICSPCC.2012.6335734
  • Filename
    6335734