DocumentCode :
1885622
Title :
A bitline sense amplifier for offset compensation
Author :
Myoung Jin Lee ; Ki Myung Kyung ; Hyung Sik Won ; Myoung Su Lee ; Kun Woo Park
Author_Institution :
Hynix Semicond., Icheon, South Korea
fYear :
2010
fDate :
7-11 Feb. 2010
Firstpage :
438
Lastpage :
439
Abstract :
We design a DRAM bitline sense-amplifier (BLSA) immune to data-pattern-dependent sensing noise. We fabricate a 68 nm DRAM chip using the scheme and the measured results match the simulation results. The BLSA has 15% of the total sensing noise of the fabricated conventional BLSA.
Keywords :
DRAM chips; amplifiers; DRAM; bitline sense-amplifier; data-pattern-dependent sensing noise; offset compensation; size 68 nm; Background noise; Driver circuits; Joining processes; Noise figure; Noise level; Noise measurement; Random access memory; Semiconductor device noise; Solids; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
978-1-4244-6033-5
Type :
conf
DOI :
10.1109/ISSCC.2010.5433892
Filename :
5433892
Link To Document :
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