Title :
Automatic verification of speed-independent circuits with Petri net specifications
Author :
Dill, David L. ; Nowick, Steven M. ; Sproull, Robert F.
Author_Institution :
Stanford Univ., CA, USA
Abstract :
Asynchronous designs are of increasing interest because of the cost of broadcasting clocks over large areas of a chip. A tool for comparing implementations of speed-independent circuits with specifications is described. Petri nets are used throughout as a user-level description language. These are translated into trace structures, which can then be processed by an existing automatic verifier. This tool is applied to a nontrivial self-timed queue design
Keywords :
Petri nets; formal specification; logic circuits; logic testing; specification languages; Petri net specifications; asynchronous designs; automatic verification; automatic verifier; nontrivial self-timed queue design; speed-independent circuits; trace structures; user-level description language; Asynchronous circuits; Bars; Clocks; Error correction; Hardware; Humans; Petri nets; Protocols; Queueing analysis; Wire;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1989. ICCD '89. Proceedings., 1989 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-1971-6
DOI :
10.1109/ICCD.1989.63358
