Title :
A 45nm CMOS 13-port 64-word 41b fully associative content-addressable register file
Author :
Burda, G. ; Kolla, Y. ; Dieffenderfer, James ; Hamdan, F.
Author_Institution :
Qualcomm, Raleigh, NC, USA
Abstract :
A13-port 64-word 41 b fully associative content-addressable register file that is part of a dual-issue superscalar ARMv7-architecture CPU is described. The register file is part of the register-renaming function within the CPU, allowing for the resolution of data hazards common to out-of-order superscalar CPUs. The register file occupies 0.062 mm2 in a 1.1 V 45 nm CMOS technology and operates at 1.4 GHz while consuming 21 mW.
Keywords :
CMOS memory circuits; UHF integrated circuits; content-addressable storage; microprocessor chips; shift registers; CMOS; CPU; associative content-addressable register file; data hazards resolution; dual-issue superscalar ARMv7-architecture; frequency 1.4 GHz; power 21 mW; register-renaming function; size 45 nm; voltage 1.1 V; CMOS process; Circuits; DH-HEMTs; Delay; Energy consumption; Logic; Pipelines; Radio frequency; Read-write memory; Registers;
Conference_Titel :
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4244-6033-5
DOI :
10.1109/ISSCC.2010.5433924