Parallel prefix adder design using quantum-dot cellular automata

Quantum-dot cellular automata (QCA) represents a very promising emerging technology, which has been claimed to be faster and smaller than the most traditional CMOS technology. In the last years, important advances have been made in QCA designs, since the introduction of basic logic gates until the insertion of more complex circuits, like adders. However, new paradigms and challenges have emerged in this sense. The implementation of the basic blocks necessary to build parallel prefix adders (PPAs) is presented in this work. These blocks have been evaluated and validated through the construction of a 4-bit PPA. The proposed adder implementation is compared to other QCA adders available in the literature.