• DocumentCode
    1886651
  • Title

    Design for improving linearity of transconductor by canceling effect of mobility degradation from vertical field

  • Author

    Yamaguchi, I. ; Matsumoto, F.I. ; Noguchi, Y.

  • Author_Institution
    Nat. Defense Acad., Japan
  • fYear
    2005
  • fDate
    18-20 May 2005
  • Firstpage
    14
  • Abstract
    Summary form only given. A transconductor using the bias offset technique is known as a linear MOS transconductor. In practice, however, the transfer characteristic exhibits nonlinearity due to mobility degradation from the vertical field. This paper proposes a design for improving linearity of the transconductor by canceling the effect of mobility degradation from the vertical field. This technique is to design the transconductance factors of the transistors to cancel the effect of mobility degradation. The results of SPICE simulation show that under the condition where the mobility degradation factor is 0.2 or less, the transconductance error of the conventional design becomes less than 15%, while that of the proposed design becomes less than 2%. Even if the tail current is changed, the transconductance error hardly increases.
  • Keywords
    MOSFET circuits; SPICE; analogue circuits; carrier mobility; linearisation techniques; SPICE; bias offset technique; linear MOS transconductor; mobility degradation effect cancellation; nonlinear transfer characteristics; tail current; transconductance error; transconductor linearity improvement; transistor transconductance factors; vertical field induced mobility degradation; CMOS technology; Chebyshev approximation; Degradation; Dynamic range; Filters; Linearity; SPICE; Tail; Transconductance; Transconductors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Nonlinear Signal and Image Processing, 2005. NSIP 2005. Abstracts. IEEE-Eurasip
  • Conference_Location
    Sapporo
  • Print_ISBN
    0-7803-9064-4
  • Type

    conf

  • DOI
    10.1109/NSIP.2005.1502232
  • Filename
    1502232