• DocumentCode
    1887116
  • Title

    A 64Mb MRAM with clamped-reference and adequate-reference schemes

  • Author

    Tsuchida, Kensei ; Inaba, Takaaki ; Fujita, Kinya ; Ueda, Yuzuru ; Shimizu, Tsuyoshi ; Asao, Y. ; Kajiyama, Tomoko ; Iwayama, M. ; Sugiura, Komei ; Ikegawa, S. ; Kishi, T. ; Kai, Takafumi ; Amano, M. ; Shimomura, Naoharu ; Yoda, Hidehiko ; Watanabe, Yoshi

  • Author_Institution
    Toshiba, Yokohama, Japan
  • fYear
    2010
  • fDate
    7-11 Feb. 2010
  • Firstpage
    258
  • Lastpage
    259
  • Abstract
    A 64 Mb spin-transfer-torque MRAM in 65 nm CMOS is developed. A 47 mm2 die uses a 0.3584 ¿m2 cell with a perpendicular-TMR device. To achieve read-disturb immunity for the reference cell, a clamped-reference scheme is adopted. An adequate-reference scheme is implemented to suppress read-margin degradation due to the resistance variation of reference cells.
  • Keywords
    CMOS integrated circuits; random-access storage; reference circuits; tunnelling magnetoresistance; CMOS integrated circuit; adequate reference; clamped reference; perpendicular TMR device; read-disturb immunity; reference cell; size 65 nm; spin transfer torque MRAM; storage capacity 64 Mbit; Circuits; Clamps; MOS devices; MOSFETs; Magnetic switching; Mirrors; Nonvolatile memory; Random access memory; Switches; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0193-6530
  • Print_ISBN
    978-1-4244-6033-5
  • Type

    conf

  • DOI
    10.1109/ISSCC.2010.5433948
  • Filename
    5433948
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1887116