A 2.4GHz 830pJ/bit duty-cycled wake-up receiver with −82dBm sensitivity for crystal-less wireless sensor nodes

Author

Drago, S. ; Leenaerts, Domine M. W. ; Sebastiano, Fabio ; Breems, Lucien J. ; Makinwa, Kofi A. A. ; Nauta, Bram

Author_Institution

NXP Semicond., Eindhoven, Netherlands

fYear

2010

fDate

7-11 Feb. 2010

Firstpage

224

Lastpage

225

Abstract

A 65 nm CMOS 2.4 GHz wake-up receiver operating with low-accuracy frequency references has been realized. Robustness to frequency inaccuracy is achieved by employing non-coherent energy detection, broadband-IF heterodyne architecture and impulse-radio modulation. The radio dissipates 415 Â¿W at 500 kb/s and achieves a sensitivity of -82 dBm with an energy efficiency of 830 pJ/bit.

Keywords

CMOS integrated circuits; UHF integrated circuits; field effect MMIC; radio receivers; ultra wideband communication; wireless sensor networks; CMOS wake up receiver; bit rate 500 kbit/s; broadband IF heterodyne architecture; crystal less wireless sensor nodes; frequency 2.4 GHz; impulse radio modulation; non coherent energy detection; power 415 muW; size 65 nm; Baseband; Bit error rate; Clocks; Filters; Gain measurement; Pulse amplifiers; Radio frequency; Radiofrequency amplifiers; Voltage; Wireless sensor networks;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International

Conference_Location

San Francisco, CA

ISSN

0193-6530

Print_ISBN

978-1-4244-6033-5

Type

conf

DOI

10.1109/ISSCC.2010.5433955

Filename

5433955