DocumentCode :
1887553
Title :
A 65nm CMOS 2.4GHz 31.5dBm power amplifier with a distributed LC power-combining network and improved linearization for WLAN applications
Author :
Afsahi, Ahmad ; Behzad, A. ; Larson, Lawrence E.
Author_Institution :
Univ. of California, San Diego, CA, USA
fYear :
2010
fDate :
7-11 Feb. 2010
Firstpage :
452
Lastpage :
453
Abstract :
A 2.4 GHz CMOS power amplifier with a distributed LC power-combining network and improved linearization for high-power WLAN applications is presented. With a 3.3 V supply the PA produces a saturated power of 31.5 dBm with peak PAE of 25 %. By utilizing multiple linearization techniques, an EVM of -25 dB is achieved at 25.5 dBm for the 2.4 GHz band. The PA occupies 2.7mm2 in 65 nm CMOS.
Keywords :
CMOS analogue integrated circuits; UHF amplifiers; power amplifiers; power combiners; wireless LAN; CMOS power amplifier; distributed LC power-combining network; efficiency 25 percent; frequency 2.4 GHz; high-power WLAN; multiple linearization techniques; size 65 nm; voltage 3.3 V; Degradation; Distortion measurement; Distributed amplifiers; Impedance; Linearity; Nonlinear distortion; Power amplifiers; Power generation; Power harmonic filters; Wireless LAN;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
978-1-4244-6033-5
Type :
conf
DOI :
10.1109/ISSCC.2010.5433961
Filename :
5433961
Link To Document :
بازگشت