DocumentCode
1887616
Title
A 5mm2 40nm LP CMOS 0.1-to-3GHz multistandard transceiver
Author
Ingels, M. ; Giannini, V. ; Borremans, Jonathan ; Mandal, G. ; Debaillie, Bjorn ; van Wesemael, P. ; Sano, Tomomi ; Yamamoto, Takayuki ; Hauspie, D. ; Van Driessche, Joris ; Craninckx, Jan
Author_Institution
IMEC, Leuven, Belgium
fYear
2010
fDate
7-11 Feb. 2010
Firstpage
458
Lastpage
459
Abstract
A 5mm2 40nm digital CMOS multimode transceiver is presented. The 0.1-to-6GHz RX features 4 LNAs, 25% passive mixer with IIP2 calibration, 5th order baseband filtering and a 50fJ/conversion step ADC. It achieves NF down to 2.4dB, better than -30dB EVM and 50dBm IIP2. A 0.1-to-3Ghz TX with baseband filter, voltage-sampled mixer and PPA achieves 3.2% EVM at OdBm output, with CNR down to -156dBc/Hz. The system uses two dual-VCO 5.9-to-12.8GHz fractional-N PLLs.
Keywords
CMOS integrated circuits; calibration; filters; mixers (circuits); transceivers; 5th order baseband filtering; IIP2 calibration; baseband filter; digital CMOS multimode transceiver; frequency 0.1 GHz to 6 GHz; multistandard transceiver; passive mixer; size 40 nm; voltage-sampled mixer; Baseband; Circuit noise; Energy consumption; Impedance matching; Power generation; Resistors; Transceivers; Transformers; Voltage; Wideband;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International
Conference_Location
San Francisco, CA
ISSN
0193-6530
Print_ISBN
978-1-4244-6033-5
Type
conf
DOI
10.1109/ISSCC.2010.5433964
Filename
5433964
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