Compact thermal model for phase change memory nanodevices

Ge₂Sb₂Te₅ (GST)-based phase change memory (PCM) is a digital memory technology set to replace flash because of its greater scalability, lower programming power requirements, faster read-write times, and enhanced durability. Modeling efforts have focused on characterizing the coupled electrical, thermal, and phase-transition processes that define PCM switching events. Understanding the effects of device geometry and cell material properties on temperature distribution, heat flow, and thermal switching times is critical for design optimization. This work develops a compact thermal model that efficiently calculates transient and steady-state temperature scaling trends associated with GST thickness, width, and thermal conductivity. Compact model results indicate that there is an optimal phase-change layer thickness for maximizing cell peak temperature. Lowering GST thermal conductivity enhances PCM scalability by decreasing this optimal thickness and also shortens device programming times. In contrast, decreasing phase-change layer width increases cell peak temperature at the expense of programming speed. Thermal boundary resistance affects both spatial and temporal scaling trends.