Low thermal resistance AlN PGA with low inductance of power lines

A low-thermal-resistance and high-speed pin-grid-array (PGA) package with low-inductance power lines was proposed, and its feasibility was confirmed. To obtain low-inductance power lines, the wiring system in the package kept power-line layers and signal-line layers separate. Low inductance of power lines was realized by using conductive layers with a large area in an aluminium nitride (AlN) substrate and arranging the power pins just under the silicon chips. A high signal-propagation speed was realized by sandwiching radial signal lines between low-dielectric-constant polyimide layers. To obtain low thermal resistance, a silicon chip was soldered onto the metallized AlN ceramic substrate. High thermal conductivity of AlN ceramics and the arrangement of pins on the AlN substrate surface opposite the side of the silicon chip resulted in low thermal resistance of the package. The package on the printed wiring board had a thermal resistance of 3.0°C/W at an air velocity of 1 m/s using a 14-mm-high aluminium cooling heat sink. The self-inductance of the power lines was 1.4 nH in the package substrate without pins and bonding wires