Title :
A 30fJ/conversion-step 8b 0-to-10MS/s asynchronous SAR ADC in 90nm CMOS
Author :
Harpe, Pieter ; Cui Zhou ; Xiaoyan Wang ; Dolmans, G. ; de Groot, Harmke
Author_Institution :
Holst Centre-IMEC, Eindhoven, Netherlands
Abstract :
An 8 b SAR ADC is presented. The 90 nm CMOS prototype achieves an ENOB of 7.8 b at a sampling frequency of 10.24 MS/S. The use of asynchronous dynamic CMOS logic, custom-designed capacitors, an internal common-mode shift and low-leakage design techniques results in a power consumption of 69 ¿W from a 1 V supply. The corresponding FoM equals 30 fJ/Conversion-step and is maintained down to 10 kS/s.
Keywords :
CMOS logic circuits; analogue-digital conversion; asynchronous circuits; capacitors; power consumption; synthetic aperture radar; asynchronous SAR ADC; asynchronous dynamic CMOS logic; conversion step; custom designed capacitors; internal common mode shift; low leakage design; power 69 muW; power consumption; sampling frequency; size 90 nm; voltage 1 V; CMOS logic circuits; Clocks; Energy consumption; Frequency measurement; Inverters; Parasitic capacitance; Power measurement; Sampling methods; Switched capacitor networks; Switches;
Conference_Titel :
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4244-6033-5
DOI :
10.1109/ISSCC.2010.5433967
