A 30 MHz programmable CMOS video FIR filter and correlator

A VLSI chip has been designed to perform two important functions in video image processing, namely, programmable finite-impulse response (FIR) filtering and correlation. In the FIR mode, the chip performs eight states (taps) of filtering with 9 b of video data and 8 b of coefficients. The coefficients can be dynamically changed by loading in a new set. The chips can be directly cascaded to extend the stages of filtering in multiples of eight, without any additional glue chips. In the correlation mode, the chip correlates the input signals. The chip has 32200 transistors and has been fabricated in 2- mu m, double-metal low-power silicon CMOS technology. Testing indicated that the chip worked at 31 MHz at room temperature and 5 V.<>