Generalized switching logic scheme for CCM-PFC interleaved boost converters

This work presents an improvement in the operation of the interleaved boost PFC achieved by a new switching logic scheme. In this technique, the choice of the operation mode is defined by the value of the duty cycle of the converter, which does not depend on the relationship between input and output voltages. The new switching logic scheme keeps the input current ripple minimum through the appropriate phase shifting of the command signals. The concept of the switching logic scheme is extended to n cells. Both the switching logic algorithm and the impact of number of cells under input current ripple are discussed. Experimental results of a conventional boost and an interleaved boost converter with two cells are compared.