Title :
Parylene encapsulation of ceramic packages for liquid nitrogen application
Author :
Tong, H.M. ; Mok, L. ; Grebe, K.R. ; Yeh, H.L. ; Srivastava, K.K. ; Coffin, J.T.
Author_Institution :
IBM, Yorktown Heights, NY, USA
Abstract :
A study was undertaken to determine the effectiveness of a thin layer (9.4 μm in thickness) of a chemical-vapor-deposited polymer, Parylene, in enhancing the solder lifetime of IBM ceramic packages containing large-DNP (distance to neutral point) test chips during liquid-nitrogen operation. Coated and uncoated (control) packages with chips joined using C4 (controlled collapse chip connection) Pb/Sn solder technology were thermally cycled between near room temperature and liquid-nitrogen temperature. At every 50 or 100 cycles, the electrical resistances of solder joints were measured at room temperature for the nondestructive detection of solder failures based on a solder electrical-resistance criterion. The thermal cycling experiment and electrical measurement were continued until solder failure was first noticed in coated packages. The number of cycles to first failure was twice the corresponding number for uncoated packages. To help interpret this two-fold solder-life enhancement associated with parylene, an elastoplastic finite-element model was developed and used to determine the thermal strain and stress distributions near failed solder joints for coated and uncoated packages during thermal cycling. Based on the results provided by this model and a low-temperature solder lifetime model, the extended solder life was attributed to the ability of Parylene to modify the strain and stress fields in the solder joint as well as to its barrier and conformal-coating properties
Keywords :
CVD coatings; encapsulation; environmental testing; life testing; packaging; polymer films; soldering; 300 to 77 K; 9.4 micron; C4 joints; IBM; Parylene; Pb-Sn solder; chemical-vapor-deposited polymer; coated packages; conformal-coating properties; controlled collapse chip connection; cycles to first failure; elastoplastic finite-element model; electrical resistances of solder joints; encapsulation of ceramic packages; large DNP test chips; large test chips; liquid N2 operation; low-temperature solder lifetime model; solder-life enhancement; stress distributions; thermal cycling experiment; thermal strain; thermally cycled; uncoated packages; Ceramics; Electric variables measurement; Electrical resistance measurement; Encapsulation; Nitrogen; Packaging; Soldering; Temperature control; Temperature measurement; Thermal stresses;
Conference_Titel :
Electronic Components and Technology Conference, 1990. ., 40th
Conference_Location :
Las Vegas, NV
DOI :
10.1109/ECTC.1990.122213