DocumentCode :
1888679
Title :
A VLSI implementation of the Blowfish encryption/decryption algorithm
Author :
Lin, Youn-Long ; Youn-Long Lin
Author_Institution :
Dept. of Comput. Sci., Nat. Tsing Hua Univ., Hsinchu, Taiwan
fYear :
2000
fDate :
9-9 June 2000
Firstpage :
1
Lastpage :
2
Abstract :
We propose an efficient hardware architecture for the Blowfish algorithm. The speed is up to 4 bit/clock, which is 9 times faster than a Pentium. By applying operator-rescheduling method, the critical path delay is improved by 21.7%. We have successfully implemented it using Compass cell library targeted at a 0.6 /spl mu/m TSMC SPTM CMOS process. The die size is 5.7/spl times/6.1 mm/sup 2/ and the maximum frequency is 50 MHz.
Keywords :
CMOS digital integrated circuits; VLSI; circuit CAD; cryptography; discrete Fourier transforms; firmware; integrated circuit design; 0.6 micron; 50 MHz; Blowfish encryption/decryption algorithm; Compass cell library; TSMC SPTM CMOS process; VLSI implementation; critical path delay; die size; hardware architecture; operator-rescheduling method; Character generation; Computer science; Control system synthesis; Cryptography; Delay; Frequency; Hardware; Protection; Random access memory; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2000. Proceedings of the ASP-DAC 2000. Asia and South Pacific
Conference_Location :
Yokohama, Japan
Print_ISBN :
0-7803-5973-9
Type :
conf
DOI :
10.1109/ASPDAC.2000.835049
Filename :
835049
Link To Document :
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