An 8/spl times/8-b nRERL serial multiplier for ultra-low-power applications

Author

Lim, Joonho ; Kim, Dong-Gyu ; Kang, Sang-Chul ; Chae, Soo-Ik

Author_Institution

Global Commun. Technol. Inc., CA, USA

fYear

2000

fDate

9-9 June 2000

Firstpage

35

Lastpage

36

Abstract

An 8/spl times/8-b nRERL serial multiplier is implemented in a 0.6-/spl mu/m n-well 3-metal CMOS process. nRERL (nMOS Reversible Energy Recovery Logic) is a new reversible adiabatic logic circuit, which can be operated at the leakage-current level for ultra-low-energy applications. Measurement results showed that the nRERL serial multiplier consumed only 0.9% of the energy dissipation by the static CMOS type at the operating frequency 100 kHz at 5 V, where its adiabatic and leakage losses were about equal.

Keywords

MOS logic circuits; digital arithmetic; low-power electronics; multiplying circuits; 0.6 micron; 100 kHz; 5 V; 8 bit; NMOS serial multiplier; leakage-current level operation; n-well 3-metal CMOS process; nRERL serial multiplier; reversible adiabatic logic circuit; reversible energy recovery logic; ultra-low-power applications; CMOS logic circuits; Clocks; Delay; Energy dissipation; Logic circuits; MOS devices; Pipelines; Power generation; Switches; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 2000. Proceedings of the ASP-DAC 2000. Asia and South Pacific

Conference_Location

Yokohama, Japan

Print_ISBN

0-7803-5973-9

Type

conf

DOI

10.1109/ASPDAC.2000.835066

Filename

835066